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USB PHY Architecture for 1.8 Volts Devices - Chipidea

Posted in USB, Low Power, IP - Intelectual Property
On Friday, June 1, 2007

Chipidea introduced a new USB physical layer architecture using 1.8V IO devices. The new USB PHY architecture  offers complete line of USB IP and provides a low power consumption (around 70mW). The usage of 1.8V IO devices is an extends Chipidea's USB catalog from IO devices of 3.3V and 2.5V to offer designers the wide  range of options for their USB connectivity integration strategies.

Celio Albuquerque, Chipidea, said:



We are offering a new generation of USB IP cores using 1.8V devices for designers that require the lowest power consumption…

This 1.8V platform extends our portfolio to a new IO device choice, while maintaining the advantages of our IP, including analog programmability, built-in self-test (BIST) and full USB2.0 compliance…

Chipidea's 1.8V USB PHY is compliant with the USB 2.0 specification. This compliance guarantees D+ and D- protection to withstand transient short-circuit voltage without damage. The core also features analog programmability for fine-tuning, allowing designers to achieve the best performance for their integrated systems. The IP is available as a standalone PHY or matched with a USB controller.

Further reading: Chipidea USB PHY Architecture for 1.8 Volts Devices


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