USB 2.0 On-The-Go PHY for 65nm Process - Synopsys
Posted in USB, IP - Intelectual Property, Chip, Semiconductor, SynopsysOn Thursday, May 17, 2007
Synopsys announced that its DesignWare USB 2.0 nanoPHY is the first USB 2.0 PHY intellectual property (IP) for TSMC's 65nm process to successfully pass the USB-IF Hi-Speed On-The-Go (OTG) PHY certification. Synopsys' USB 2.0 nanoPHY mixed-signal IP, now available in the TSMC 65-nm process nodes, uses half the power and die area compared to previous USB solutions.
John Koeter, Synopsys, said:
The availability of proven mixed-signal IP continues to be a key factor in enabling migration of SoC designs to advanced small-geometry processes…
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We've worked closely with TSMC in creating this 65-nm USB 2.0 nanoPHY IP to help designers achieve power and area savings while meeting TSMC's rigorous design-for-manufacturing standards. Our attention to these details provides designers the confidence that the nanoPHY will deliver low power, small area, maximum yield and long-term reliability…
Synopsys IP architects designed the DesignWare USB 2.0 nanoPHY for long-term electrical performance of the USB 2.0 nanoPHY when implemented in the 2.5 V transistor process option. Since the nanoPHY must maintain USB compliance and thereby support 3.3V and 5V signaling levels, careful attention was required to ensure that the 2.5V structures would not be overstressed. Extensive simulations were specifically developed across worst-case conditions to ensure consistent, long-term nanoPHY operation.
Kuo Wu, TSMC, said:
Designers require that we provide them access to reliable, low-risk and proven mixed-signal connectivity IP such as USB 2.0…
This latest generation of USB 2.0 nanoPHYs from Synopsys allows designers to quickly integrate USB 2.0 connectivity into their system-on-chip designs and ramp into high-volume production…
The DesignWare USB 2.0 nanoPHY is part of the complete USB OTG solution from Synopsys. Combined with Synopsys' USB 2.0 high-speed OTG controller and USB Verification IP, Synopsys offers a proven, 65-nm solution for high speed OTG applications. The DesignWare USB IP products, including the PHYs have been certified in hundreds of applications.
Further info: Synopsys USB 2.0 On-The-Go PHY on 65nm Process
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