Ubicom IP3000 WiFi/Ethernet Processor
Posted in RTOS, TCP/IP Stack, Embedded Ethernet, Development Tools, WiFi/WLAN, FavoriteOn Tuesday, May 16, 2006
Like other Ubicom network chips, The IP3000 family processors have been designed with close attention of requirements of wireless networking and packet processing.
The first family member, the IP3023-250, is ideal for 802.11a/b/g devices, such as routers, bridges, and access points.
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Ubicom claim, IP3023 has been proven to deliver up to three times the performance of comparable ARM- and MIPS-based SOC solutions.
IP3023 implements techniques such as:
- Eight-way multithreading, allows the device to effectively operate as eight separate processors. Six otf the threads can be dedicated to I/O operation.
- Zero-cycle context switching.
- Memory-to-memory architecture, allows direct manipulation of packets in on-chip memory at full speed, eliminating the need for caches.
Folowing table, directly from Ubicom, show comparation between IP3023 and IP2022.
| Â | IP3023 | IP2022 |
|---|---|---|
| Threads | 8 | 2 |
| Context Switch | 0 clocks | 3 clocks |
| Data Path | 32-bit | 8-bit |
| Clock Speed | 250 MHz | 120 Mhz |
| Code RAM | 256 KB | 16 KB |
| Data RAM | 64 KB | 4 KB |
| On-Chip Flash | 0 KB | 64 KB |
| Directly Addressable Memory Range | 4 MB | 80 KB |
| Process Technology | 0.13u CMOS | 0.25u Flash Process |
| MII Ports | 4 | 0 |
| SerDes Units | 2 | 2 |
| External Memory Controller | SDRAM | SRAM |
Possible Related Entries:
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