Synchronous Mobile Multimedia Interconnect (M2I) Chip - IDT
Posted in Multimedia, Mobile Devices, Wireless Networking, Low PowerOn Monday, May 14, 2007
Integrated Device Technology (IDT) introduced the Synchronous Mobile Multimedia Interconnect (M2I) optimized for mobile handsets and PDA. Mobile Multimedia Interconnect chip is six times faster with ninety percent less battery drain compared to previous generation interfaces. The interface of the Mobile Multimedia Interconnect enables the processor to support additional functionality such as WiFi, GPS and Bluetooth.
Mobile Multimedia Interconnect (M2I) Chip
Thomas Brenner, IDT Flow Control Management Division, said:
The high-end handset consumer demands high-speed downloads, as well as top-quality playback. However, this speed and quality must be delivered without draining the battery…
![]()
We identified the interface between the baseband and application processors as a major performance bottleneck and battery drain. It was clear that a new interconnect architecture was needed to solve this problem, so we designed the Mobile Multimedia Interconnect in close co-operation with leading high-end handset manufacturers and with the pre-eminent processor component provider in this application space…
| Feature of Mobile Multimedia Interconnect (M2I) |
|
|
|
|
|
|
|
Mobile Multimedia Interconnect (M2I) Smartphone Application
Mobile Multimedia Interconnect chip is designed to work with processors that make use of an address-data multiplexing interface, which has lower I/O count and higher bandwidth than other approaches commonly found in mobile handsets. The Mobile Multimedia Interconnect chip uses fifty percent fewer processor I/O pins. The free pins is used to support differentiating functionality. Mobile Multimedia Interconnect chip has eight dynamically programmable I/Os that can be use to control and monitor other devices.
| Benefit of Mobile Multimedia Interconnect (M2I) |
|
|
|
|
|
|
|
The Mobile Multimedia Interconnect architecture achieves its high-performance and low-battery drain using a synchronous clocking scheme that enables the use of an internal counter that eliminates the necessity for multiple addressing. The cycles run three times faster, thus providing an overall performance increase of 6X. All this is accomplished with ninety percent less battery drain.
Mobile Multimedia Interconnect chip is in sampling now. Mass production price is $3.00 (10K lot qty). The chip is shipped in BYG100 fpBGA (6mm x 6mm x 1mm) package.
Possible Related Entries:
![[Embedded System roll-b]](images/roll/roll-b-4.gif)












