Successful Fabrication Test for 80GHz Digital Transceiver

Nov 07, 2006. Via Edablog.com.

HYPRES Inc., a leading developer of superconducting microelectronics (SME) technology, achieved a major milestone when it successfully tested fabricated integrated circuits featuring a critical current density of 20 kiloamps per square centimeter (kA/cm2). This paves the way for the company to build an all-digital transceiver capable of operation in excess of 80 GHz clock speeds. Several rapid single flux quantum (RSFQ) digital circuits were fabricated and successfully tested, among them, a 325 GHz (speed) digital frequency divider, a 4-bit binary counter, and various input/output elements. HYPRES previously implemented a 4.5 kA/cm2 critical currently density fabrication process to develop an all-digital transceiver that could operate at a 40 GHz clock rate. These chips utilize Josephson junctions approximately 1.5 micron x 1.5 micron in size. This new 20 kA/cm2 process now paves the way for the company to make smaller, and therefore faster, Josephson junctions that will allow its all-digital transceiver to operate at an 80 GHz clock. The U.S. military is interested in an 80 GHz clock all-digital transceiver in order to meet its growing communications challenges—where harsh operating environments, expanding performance requirements, and extreme technology gaps are the norm, and where the benefits of digital superconductivity offer tremendous opportunity.