STi5202 Set-Top Boxes/DVD Decoder Chip - STMicroelectronics

STMicroelectronics (ST) introduced new low-cost STi5202 Set-Top Boxes (STB) /DVD decoder chip. The new chip is built on the same architecture as STi7109 H.264 high-definition decoder, and it is also software compatible. The STi5202 Set-Top Boxes/DVD decoder chip integrates an advanced video decoder supporting MPEG-2 and H.264/AVC coding standard, together with a flexible multi-channel audio decoder that handles all broadcast audio standards. STi5202 decoder chip is intended for standard-definition terrestrial, satellite, cable, and IPTV applications.

STMicroelectronics STi5202 Set-Top Boxes/DVD Decoder Chip

Key features of STi5202 Set-Top Boxes/DVD Decoder Chip

• Single-chip, video decoder including

  •  Linux, Windows CE and OS21 compatible ST40 CPU core: 266 MHz

  •  Transport filtering and descrambling

  •  Video decoder: VC-1 (including WMV 9), H.264 (MPEG-4 part 10) and MPEG-2

  •  SVP compliant

  •  Windows Media DRM support

  •  ST40 32-bit superscaler RISC CPU

• Embedded interfaces

  •  USB 2.0 host controller/PHY interface

  •  DVI/HDMI output

  •  Digital audio and video auxiliary inputs

  •  Low-cost modem

  •  100BT ethernet controller with integrated MAC and MII/RMII interface for external PHY

STMicroelectronics STi5202 Set-Top Boxes Decoder Block Diagram

ST also includes its fourth-generation security technology in this new Set-Top Boxes chip. This feature makes STi5202 decoder chip able to support the Secure Video Processor (SVP) standards and Windows Media DRM 10, both protecting content and allowing digital rights to be passed between consumer devices.

The STi5202 Set-Top Boxes/DVD Decoder Chip supports DivX, Flash video and video-conferencing standards, and also the new Chinese AVS1-P2 Jizhun Profile 4.0 level (SD) video decoding standard.

Connectivity is provided by on-chip Ethernet and USB 2.0 Hi-Speed interfaces, enabling the decoder to play a key role as a thin client in a home network environment. In addition, optional HDMI (High-Definition Multimedia Interface) can provide SD video for HD displays. A programmable transport stream interface (PTI) manages inputs from satellite, cable and terrestrial tuners.

Embedded in the STi5202 is a powerful 266MHz ST40 CPU core, which is supported by industry-standard operating systems such as Linux and Microsoft Windows CE. ST provides a suite of robust, integrated STAPI software drivers, plus a comprehensive set of hardware and software tools to enable rapid product development. A software evaluation platform and reference design is also available, with full schematics, and with source code for STAPI-based reference software that is compatible with the STi7109.

STi5202 Set-Top Boxes/DVD Decoder Chip is powered by a 266MHz ST40 CPU core, which is supported by Linux and Windows CE operating systems. ST provides a suite of robust, integrated STAPI software drivers, plus a comprehensive set of hardware and software tools to enable rapid product development. A software evaluation platform and reference design is also available, with full schematics, and with source code for STAPI-based reference software that is compatible with the STi7109.

Application example of STi5202 Set-Top Boxes/DVD Decoder Chip: Low-cost IP-TV set-top box with HDD

An Application of STi5202 : IP-TV set-top box with HDD

Detailed Features of STi5202 Set-Top Boxes/DVD Decoder Chip

Source: _http://www.st.com/stonline/products/literature/bd/14050.pdf

The STi5202 is a single-chip,standard-definition video decoder including:

•  Flexible audio decoder

•  Windows Media DRM support

•  Microsoft VC-1, WMA9 and H.264 MPEG2 support

•  Linux, Windows CE and OS21 compatible ST40 CPU core: 266 MHz

•  Transport filtering and descrambling

•  SVP compliant

•  Graphics engine and dual display: standard and enhanced definition

•  USB 2.0 host controller/PHY interface

•  DVI/HDMI output (optional)

•  Low-cost modem

•  100BT ethernet controller with integrated MAC and MII/RMII interface for external PHY

•  266 MHz, 2-way set associative 16-Kbyte ICache, 32-Kbyte DCache, MMU

•  5-stage pipeline, delayed branch support

•  Floating point unit, matrix operation support

•  Debug port, interrupt controller

•  TS merger/router

  •  Merging of 3 external transport streams (2 serial/parallel inputs, 1 bidirectional interface)

  •  Transport streams from memory support

  •  NRSS-A module interface

•  Programmable transport interfaces (PTIs)

  •  Two programmable transport interfaces

  •  Two transport stream demultiplexers: DVB, DIRECTV, ATSC, ARIB, OpenCable, DCII

  •  Integrated DES, AES, DVB and Multi2 descramblers

  •  NDS random access scrambled stream protocol (RASP) compliant

  •  NDS ICAM CA

  •  Support for VGS, Passage

•  Microsoft WMV 9/VC-1 MP@ML and AP@L1/H.264(MPEG-4 part 10) main and high profile level 3/MPEG-2 MP@ML video decoder

  •  Advanced error concealment and trick mode support

  •  Dual SD decoding

•  SD digital video input

•  Displays

  •  One ED display multi format capable (480p/576p, 480i/576i)

    •  analog ED output RGB or YPbPr

    •  HDMI encoded output

  •  One standard-definition display

    •  analog SD output: YPbPr or YC and CVBS

•  Gamma 2D graphics processor

  •  Triple source 2D gamma blitter engine

  •  Alpha blending and logical operations

  •  Color space and format conversion

  •  Fast color fill

  •  Arbitrary resizing with high quality filters

  •  Acceleration of direct drawing by CPU

•  Gamma compositor and video processor

  •  7-channel mixer for enhanced definition output

  •  Independent 2-channel mixer for SD output

  •  3 graphic display planes

  •  High-quality video scaler

  •  Motion and detail adaptive deinterlacer

  •  Linear resizing and format conversions

  •  Horizontal and vertical filtering

•  Copy protection

  •  HDMI/HDCP copy protection hardware

  •  SVP compliant

  •  Macrovision copy protection for 480i, 480i, 576i, 576p outputs

  •  DTCP-IP

  •  AWG-based DCS analog copy protection

•  Digital audio decoder

  •  Support for all the most popular audio standards including WMA-9, WMA-9 Pro, MPEG-1 layer I/II, MPEG-2 layer II, MPEG-2 AAC, MPEG-4 AAC LC 2-channel/5.1 channel MPEG-4 AAC+SBR 2-channel/5.1 channel, Dolby Digital EX, Pro Logic II, MLP and DTS

  •  PCM mixing with internal or external source and sample rate conversion

  •  6- to 2-channel downmixing

  •  PCM audio input

  •  Independent multichannel PCM output, S/PDIF output and analog output

•  Stereo 24-bit audio DAC for analog output

•  IEC958/IEC1937 digital audio output interface (S/PDIF)

•  CSS/CPxM copy protection hardware

•  External memory interface (EMI)

  •  16-bit interface supporting ROM, flash, SFlash, SRAM, peripherals

  •  Access in 5 banks

  •  High speed synchronous mode for interconnecting two STi5202 devices

•  External microprocessor interface (EMPI)

  •  32-bit MPX satellite, target-only interface

  •  Synchronous operation at MPX clock speed, capable of 100 MHz

•  Local memory interface (LMI)

  •  Interface (1 x 32-bit) for DDR1 200-MHz (DDR400) memories, supports 128-, 256-, 512-Mbit, and 1-Gbit devices

•  USB 2.0 host controller/PHY interface

•  100BT ethernet controller, MAC and MII/RMII

•  Flexible multi-channel DMA

The STi5202 Set-Top Boxes Decoder Chip is available in a 27 x 27mm BGA package, with the same security options as in the STi7109. Pricing is available on request.

More info: STi5202 Set-Top Boxes/DVD Decoder Chip