InCyte Chip Design Tool - Chip Estimate Corp
Posted in Development Tools, Chip, SemiconductorOn Wednesday, May 30, 2007
Chip Estimate Corp. announced (May 6) the release of technology that enables performance analysis at the earliest phase of the chip design cycle. The InCyte product provides users quantifiable feedback regarding the feasibility of achieving various performance targets for their chip. Users can now make better decisions regarding chip architecture tradeoffs to minimize the risk of missing performance goals, and to push the limits of technology with greater success.
New Technology Overview
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- Performance Analysis - Users can now get quantified feedback on the likelihood of achieving performance goals for a given chip specification, targeted at a specific manufacturing process. InCyte provides a range of frequencies achievable and recommendations on logic depth.
- Block Diagramming - Design teams can now communicate their architectural specifications visually into InCyte with the ease of use of a tool like Microsoft Visio. Users simply drag and drop IP and other design components into block diagrams that InCyte uses to estimate the size, power and cost of the resulting chip.
- Connectivity Definition - The interconnectivity of IP and other design components within a chip can now be incorporated into design specifications enabling more accurate chip planning and estimation. Connectivity provides significant enhancements to the generation of design data which can then be leveraged by IC implementation tools.
- IP Library Selection - InCyte helps guide user selection of IP libraries and provides quantified feedback on the particular density, power, leakage and performance of a given library. The software ships with models for hundreds of popular 3rd party IP libraries accessible at the click of a button and also supports internally developed IP.
- Design Flow Integration - Design specification data now links directly into leading EDA implementation flows from vendors including Cadence, Magma, Mentor Graphics and Synopsys. By coupling design specifications and IP data, InCyte now outputs design data files, such as specific scripts and wrappers to automatically feed design plans into industry standard file formats and EDA implementation tools. Users have a streamlined path from their design size, power and cost estimation to convergence in final silicon.
InCyte will be available immediately and it’s price is US$35,000
Source: Chip Estimate Corporation
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