High Speed SN74SSTE32882 Register and PLL for DDR3 RDIMMs

Nov 08, 2006. Texas Instruments introduced SN74SSTE32882, the industry’s first fully-integrated register and phase-locked loop (PLL) for DDR3 registered dual in-line memory modules (RDIMMs). This single-chip device supports high data rates of 800 MT/s (mega transfers per second) to 1,066 MT/s. One device per DIMM is required to drive up to 36 SDRAM loads. The edge-controlled circuit outputs meet SSTL_15 specifications and are optimized for terminated DIMM loads.

The SN74SSTE32882 fully supports parity features as defined by Joint Electron Device Engineering Council (JEDEC). This parity function improves reliability of server systems. The SN74SSTE32882 also supports spread spectrum clocking (SSC) to reduce EMI.

More information is available on TI website is in the Clocks and Timers Selection Guide.