FPGA Reference Design for Gigabit Passive Optical Networks (GPON) - Lattice

Lattice announced new FPGA Reference Design for Gigabit Passive Optical Networks (GPON). The new product, PURESPEED I/O Burst Mode Receiver, uses Lattice's Adaptive Input Logic technology to rapidly establish stable clock. This feature is required  to comply GPON ITU-T G.984.1 specification.

GPON technology allows carriers to offer enhanced broadband content to homes and businesses by leveraging fiber optic connections to the customer's premises. The Optical Line Termination receives data from the Optical Network Termination in bursts, and so needs to quickly lock on to data as it is sent. Traditional technology, such as Ethernet and SONET have lock latencies. With this situation, it is very difficult to use them in the upstream direction. The Lattice Burst Mode Receiver solution leverages the fast locking, low latency Adaptive Input Logic circuitry in the PURESPEED I/O to perform the data recovery.

Stan Kopec, Lattice, said:

The ability of our PURESPEED I/O System to function as an Optical Line Termination Burst Mode Receiver using the Adaptive Input Logic block is one of the genuine differentiators of the LatticeSC/M family…

…Terminating upstream GPON traffic using a mere 150mw of power is a huge advantage to customers when compared to 400mw for the nearest programmable solution and 1w for standard products. With this solution, our customers are able to terminate multiple GPON channels on a single FPGA in a remarkably compact 256 BGA package….

Key components of the PURESPEED I/O:

• Adaptive Input Logic
• Highly flexible, built-in shift register and DDR/SDR Mux/Demux logic
• High performance I/O buffers with dedicated logic to provide seamless and robust parallel source synchronous I/O solutions
• Dedicated Clock Divider circuitry for by-2 and by-4 clock division

Source: Lattice Semiconductor

For more information of lattice GPON Solutions, the company offers GPON Application Note, Reference Design and User’s Guide.