DesignWare for ARM AMBA 2, AMBA 3 AXI Protocols - Synopsys
Posted in Development Tools, ARM, IP - Intelectual PropertyOn Saturday, April 28, 2007
Synopsys released the DesignWare synthesizable IP core for the ARM AMBA 2 and AMBA 3 AXI protocols. The DesignWare Library makes easy integration of high-speed protocol into the SoC designs. It also enables developers of AMBA protocol-based systems to focus on the development of value-added elements to differentiate their products. The new DesignWare release (2007.04a) includes an AXI-to-APB3 compliant bridge with built-in fabric, a I2S protocol IP for the APB bus, and a configurable AXI-to-AXI bridge supporting a multi-layered AXI bus-based design.
John Koeter, Synopsys, said:
|
The DesignWare solution for the AMBA protocol includes all the common, frequently used infrastructure building blocks, verification IP, and assembly tools, making it a comprehensive library of AMBA protocol-based IP. This portfolio of proven IP reduces risk and enables more predictable success for engineers implementing the popular AMBA protocol standard…
The DesignWare IP for the I2S protocol implements the popular three-wire interface for streaming stereo audio between devices. This new IP removes the complexity of adopting the I2S protocol by offering a ready-to-implement, synthesizable IP. The AXI-to-APB3 bridge and fabric provides a seamless interface between the high-speed AXI bus and the APB3 peripheral bus. The AXI-to-APB3 bridge and fabric is backward-compatible with the APB 2.0 protocol and supports all existing APB-based peripherals. The AXI-to-AXI bridge provides upsizing, downsizing and multiple clock domain synchronization features between two AXI interconnects.
The DesignWare interconnect fabric helps designers meet their performance and area requirements by offering the choice of three timing configurations, providing users with the additional flexibility to optimize timing by trading off latency for clock rate.
The DesignWare solutions for AMBA interconnect include all three parts required to facilitate AMBA protocol-based subsystem designs: AMBA protocol-compliant synthesizable IP, AMBA 2 and AMBA 3 Assured Verification IP, and coreAssembler, an automated tool for rapidly assembling, configuring, and implementing AMBA 2 and AMBA 3 AXI protocol-based subsystems.
Source: DesignWare Library
Possible Related Entries:
![[Embedded System roll-b]](images/roll/roll-b-4.gif)












