AP7000 AVR32-based SoCs - Atmel

Posted in AVR, DSP - Digital Signal Processing, Embedded Ethernet, Embedded Linux, Mobile Devices, Multimedia, SoC, USB
On Tuesday, August 29, 2006

Atmel announced high performance AVR32-based SoCs, the AP7000 family. The AP7000 integrates, on a single chip, virtually all the functionality required for multimedia systems deployed in mobile phones, digital cameras, PDAs, automotive infotainment, set-top boxes and home entertainment systems as well as network switches/routers and printers.

AVR32 AP7000 Chip

Atmel’s AVR32 AP7000 Chip

Key features:

  • Multi-layer, high-speed bus architecture, parallel multiple operations.
  • Vectored multiplier co-processor.
  • Memory Management Unit,
  • DMA controller designed for high-speed data transfer between peripherals and memories.
  • Two peripheral bus bridges, allow different clock frequencies to be set for high- and low-speed peripherals.
  • Optimized clock usage to increase throughput and reduce power consumption.
  • Fully-supported Linux 2.6 kernel, for Embedded Linux application
  • 32 KB on-chip SRAM, 16 KB instruction and 16 KB data caches,

Peripherals:

  • 16-bit stereo audio DAC,
  • 2048×2048 pixel TFT/STN LCD controllers,
  • 480 Mbps USB 2.0 with on-chip transceivers (PHY),
  • Two 10/100 Ethernet MACs.
  • Serial interfaces: RS232, USART, I2S, AC97, TWI/I2C, SPI, PS/2 and several SSC (Synchronous Serial Modules) 


Atmel's AVR32 AP7000 Block Diagram

AVR32 AP7000 Block Diagram

The AVR32 core:

…was designed from the ground up as a low clock frequency, low-power CPU with special emphasis on 1) maximizing the use of computational resources with a 7-stage pipeline and three parallel sub-pipelines that support automatic data forwarding and out-of-order execution, 2) single-cycle load/store instructions with pointer arithmetic that reduces cycles required for load/store, 3) accurate branch prediction with zero-penalty branches, and 4) maximizing code density to reduce cache misses.

Development:

AP7000 family uses a single development environment for straightforward debugging. The AVR32 Instruction Set Architecture (ISA) is specifically designed for high-level
programming languages like C, C++ and Java. Compilers with C and C++ support include GNU GCC and IAR Systems’ Embedded Workbench. The compilers are able to utilize the AVR32 architecture’s SIMD- and DSP instructions from within the C/C++ programming environment. Both compilers support access to in-line assembly for tight-loop / inner-loop algorithmic optimizations.

Atmel STK1000 Starter Kit:

The STK1000 Development kit is a complete environment for evaluating and developing with the Atmel’s AP7000 microcontrollers. The microcontroller is preloaded with Linux 2.6 kernel. Included is the AVR Studio and the open-source gcc C/C++compiler.

The STK1000 board features:

  • 8-Mbyte flash, SDRAM
  • QVGA (320 x 240) LCD display
  • VGA output
  • 2 x RJ45 (10/100 Mbit Ethernet)
  • USB v2.0 high-speed port
  • SD/MMC and CF memory card expansion ports
  • I²C audio codec
  • PS/2 connectors and numbers of serial communications interfaces.
  • I/O of the microcontroller can be accessed via a header connector

ATNGW100 Network Gateway (NGW)

Atmel’s ATNGW100 Network Gateway (NGW) is a development kit for AVR32 microcontrollers. The Network Gateway kit is targeted for AVR based embedded Linux network application development. The development kit includes a board with AT32AP7000 processor with preprogrammed Linux 2.6.18 operating system, dual Ethernet interfaces, high-speed USB 2.0, SD card slot, RS232 port and I/O extension header.

Pricing:

The first device of the AP7000 family, the AT32AP7000, is priced at $16.60 /10K lot. The price of STK1000 development kit is $499 and the ATNGW100 Network Gateway is $69.

Source: AVR32 32-bit MCU/DSP AP7000

One Response to “AP7000 AVR32-based SoCs - Atmel”

  1. Does Foleo use an Atmel AP7000 Microcontroller? « Foleo Fan Says:

    [...] A few details from Embedded-System.net: [...]


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