ASIC Prototyping with HapsTrak Compatible SerDes Daughter Board for High Speed Data Rate Applications - HARDI

HARDI announced a solution to high speed interfaces for ASIC prototyping with a HapsTrak compatible SerDes daughter board. HapsTrak guarantees that this SerDes daughter board will be compatible with all previous and future generations of HAPS motherboards.

HARDI GBx1_1×2 HapsTrak Compatible SerDes Daughter Board

The HAPS Prototyping System
HAPS is the first modular FPGA board system providing high speed, high capacity, real-time debugging and full ASIC functionality for ASIC prototyping designers. The system is composed of multi-FPGA motherboards and standard or user developed daughter boards. To accommodate very large designs, designers can connect several motherboards in many different ways. HAPS gives designers virtually the same functionality and performance as the ASIC.

HAPS = HARDI ASIC Prototyping System
SerDes = Serial-Deserial

Lars-Eric Lundgren, HARDI, said:

We are seeing more and more customers run into significant issues with high speed interfaces while prototyping…

We are thrilled to have had the opportunity to work closely with LSI to solve this problem and offer such a robust high-speed connectivity solution to our ASIC prototyping customers. We continually strive to provide more value to our customers by getting them prototyping faster with more accurate ASIC functionality and this new daughter board is an extension of that goal…

High data rates transmission are more difficult to verify and prototype. Not only are the electrical and logical behaviors different between ASIC and FPGA SerDes, but the RTL verified in the prototype also requires special attention to adapt to the functionality differences.

A more accurate alternative is to prototype using a native ASIC SerDes in an evaluation chip. The engineering teams at HARDI and LSI have worked together to develop a HapsTrak compatible SerDes Daughter Board hosting the LSI evaluation chip. All high speed PCB layout issues have also been addressed. For example, signal integrity is of paramount importance. Detailed attention is required for the prototyping PCB and cabling designs including clean power supplies and grounding, controlled impedance transmission lines and low noise. Cross-talk, reflections, impedance matching, and length matching are some of the layout issues that must be dealt with.

HapsTrak SerDes Daughter Board will be on display at the Design Automation Conference at the San Diego Convention Center, California  from June 4 to 7.

Further reading: HARDI SerDes Daughter board