ARM Physical IP for 130nm Designs - Dongbu HiTek
Posted in ARM, Low Power, IP - Intelectual PropertyOn Monday, July 23, 2007
Dongbu HiTek, a Korean company, announced the immediate availability of its ARM low-power and speed-and-density optimized physical IP for designers developing CMOS chips processed at the 130nm node. The licensed ARM Metro and SAGE-X standard libraries including Power Management Kits and memory compilers support advanced chip solutions targeting battery-operated applications.
About Dongbu HiTek
Dongbu HiTek Co., Ltd. emerged from the synergistic fusion of Dongbu Hannong Chemicals and Dongbu Electronics in 2007. With a lineage of technology innovation spanning more than half a century, Dongbu HiTek is structured to maintain a strong customer focus and global competitiveness across its three major businesses, namely: Agriculture, Materials, and Semiconductor. Committed to improving the quality of life through the use of advanced technologies, Dongbu HiTek is well positioned to deliver best-in-class products and services to the bio and semiconductor industries.
Dr. Jae Song, Dongbu HiTek, said:
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Compared to existing design libraries that claim to improve power management, the ARM products offer more standard cells with more power consumption options… These libraries can therefore optimize power use by giving fabless chip designers more freedom…
Dr. Song presented the example:
An existing typical library provides two cells - one with a power consumption level of 1.0 uA and the other with 2.0 uA. In a situation where 1.5 uA level was required to process specific data, the design was based on the cell with a power consumption level of 2.0 uA, resulting in the waste of the remaining 0.5 uA. Dongbu HiTek's libraries licensed from ARM, however, offer more cells with more power consumption levels, such as 1.2 uA and 1.5 uA, in addition to 1.0 uA and 2.0 uA, enabling designs with a wider range of choices, thereby optimizing power use.
Dr. Song confirmed that the standard cell libraries maximize design freedom to extend battery life by minimizing power consumption, particularly during standby operation of mobile handset and consumer products such as PMPs, MP3 players and feature-rich phones.
The ARM libraries offer standard cells that are about 40 percent smaller than those used in the earlier 0.18-micron library, and the ARM Metro standard cells offer an additional 10-15 percent area reduction over SAGE-X in the 130nm node. The ARM Metro standard cell library includes power-management kits that enable dynamic and leakage power saving techniques such as clock gating, multi-voltage islands and power gating. Accordingly, the migration to 130nm processing paves the way for yielding more useful chips per wafer, and hence the opportunity to be more price competitive.
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